Description: System-level Test And Validation Of Hardware/software Systems, Hardcover by Reorda, M. Sonza (EDT); Peng, Zebo (EDT); Violante, M. (EDT); Sonza Reorda, M. (EDT), ISBN 1852338997, ISBN-13 9781852338992, Brand New, Free shipping in the US
New manufacturing technologies have made possible the integration of entire systems on a single chip. This new design paradigm, termed system-on-chip (SOC), together with its associated manufacturing problems, represents a real challenge for designers.
SOC is also reshaping approaches to test and validation activities. These are beginning to migrate from the traditional register-transfer or gate levels of abstraction to the system level. Until now, test and validation have not been supported by system-level design tools so designers have lacked the infrastructure to exploit all the benefits stemming from the adoption of the system level of abstraction. Research efforts are already addressing this issue.
This monograph provides a state-of-the-art overview of the current validation and test techniques by covering all aspects of the subject including:
- modeling of bugs and defects;
- stimulus generation for validation and test purposes (including timing errors;
- design for testability.
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Book Title: System-level Test And Validation Of Hardware/software Systems
Number of Pages: Xii, 179 Pages
Language: English
Publication Name: System-Level Test and Validation of Hardware/Software Systems
Publisher: Springer London, The Limited
Subject: Software Development & Engineering / Quality Assurance & Testing, Industrial Design / General, Electronics / Circuits / General, Electronics / General
Publication Year: 2005
Type: Textbook
Item Weight: 34.9 Oz
Author: Zebo Peng
Subject Area: Computers, Technology & Engineering
Item Length: 9.3 in
Item Width: 6.1 in
Series: Springer Series in Advanced Microelectronics Ser.
Format: Hardcover
