Static Crosstalk-Noise Analysis: For Deep Sub-Micron Digital Designs by Kurt Keu

Description: Static Crosstalk-Noise Analysis by Kurt Keutzer, Desmond A. Kirkpatrick, Pinhong Chen As the feature size decreases in deep sub-micron designs, coupling capacitance becomes the dominant factor in total capacitance. The resulting crosstalk noise may be responsible for signal integrity issues and significant timing variation. Traditionally, static timing analysis tools have ignored cross coupling effects between wires altogether. Newer tools simply approximate the coupling capacitance by a 2X Miller factor in order to compute the worst case delay. The latter approach not only reduces delay calculation accuracy, but can also be shown to underestimate the delay in certain scenarios.This book describes accurate but conservative methods for computing delay variation due to coupling. Furthermore, most of these methods are computationally efficient enough to be employed in a static timing analysis tool for complex integrated digital circuits. To achieve accuracy, a more accurate computation of the Miller factor is derived. To achieve both computational efficiency and accuracy, a variety of mechanisms for pruning the search space are detailed, including:Spatial pruning - reducing aggressors to those in physical proximity,Electrical pruning - reducing aggressors by electrical strength,Temporal pruning - reducing aggressors using timing windows,Functional pruning - reducing aggressors by Boolean functional analysis. FORMAT Paperback LANGUAGE English CONDITION Brand New Publisher Description As the feature size decreases in deep sub-micron designs, coupling capacitance becomes the dominant factor in total capacitance. The resulting crosstalk noise may be responsible for signal integrity issues and significant timing variation. Traditionally, static timing analysis tools have ignored cross coupling effects between wires altogether. Newer tools simply approximate the coupling capacitance by a 2X Miller factor in order to compute the worst case delay. The latter approach not only reduces delay calculation accuracy, but can also be shown to underestimate the delay in certain scenarios. This book describes accurate but conservative methods for computing delay variation due to coupling. Furthermore, most of these methods are computationally efficient enough to be employed in a static timing analysis tool for complex integrated digital circuits. To achieve accuracy, a more accurate computation of the Miller factor is derived. To achieve both computational efficiency and accuracy, a variety of mechanisms for pruning the search space are detailed, including:-Spatial pruning - reducing aggressors to those in physical proximity, -Electrical pruning - reducing aggressors by electrical strength, -Temporal pruning - reducing aggressors using timing windows, -Functional pruning - reducing aggressors by Boolean functional analysis. Table of Contents Miller Factor Computation for Coupling Delay.- Convergence of Switching Window Computation.- Speeding-Up Switching Window Computation.- Refinement of Switching Windows.- Functional Crosstalk Analysis.- Conclusions. Review "Finally, a detailed analysis of the silicon interconnect coupling problem! This book not only addresses the coupling noise problem, but formulates and proposes usable CAD algorithms. Since the uncertainty in silicon design performance and reliability due to increasing coupling noise will only get worse each silicon generation, these algorithms will quickly find a gratefulhome in many CAD solutions." (William J. Grundmann, Intel Fellow, Intel Corporation) "All signoff analyses - timing, coupling, power, temperature, and reliability - rely on the analysis of crosstalk noise. This book is an important contribution to the field: it provides a synthesis of analytic bounding of crosstalk effects, switching window convergence, and other recent elements of crosstalk methodology. It provides a level of understanding that will be essential for researchers, developers, and users of leading EDA tools going forward." (Andrew B. Kahng, Professor of CSE and ECE, University of California, San Diego) Promotional Springer Book Archives Long Description As the feature size decreases in deep sub-micron designs, coupling capacitance becomes the dominant factor in total capacitance. The resulting crosstalk noise may be responsible for signal integrity issues and significant timing variation. Traditionally, static timing analysis tools have ignored cross coupling effects between wires altogether. Newer tools simply approximate the coupling capacitance by a 2X Miller factor in order to compute the worst case delay. The latter approach not only reduces delay calculation accuracy, but can also be shown to underestimate the delay in certain scenarios. This book describes accurate but conservative methods for computing delay variation due to coupling. Furthermore, most of these methods are computationally efficient enough to be employed in a static timing analysis tool for complex integrated digital circuits. To achieve accuracy, a more accurate computation of the Miller factor is derived. To achieve both computational efficiency and accuracy, a variety of mechanisms for pruning the search space are detailed, including: -Spatial pruning - reducing aggressors to those in physical proximity, -Electrical pruning - reducing aggressors by electrical strength, -Temporal pruning - reducing aggressors using timing windows, -Functional pruning - reducing aggressors by Boolean functional analysis. Review Quote "Finally, a detailed analysis of the silicon interconnect coupling problem! This book not only addresses the coupling noise problem, but formulates and proposes usable CAD algorithms. Since the uncertainty in silicon design performance and reliability due to increasing coupling noise will only get worse each silicon generation, these algorithms will quickly find a gratefulhome in many CAD solutions." (William J. Grundmann, Intel Fellow, Intel Corporation) "All signoff analyses - timing, coupling, power, temperature, and reliability - rely on the analysis of crosstalk noise. This book is an important contribution to the field: it provides a synthesis of analytic bounding of crosstalk effects, switching window convergence, and other recent elements of crosstalk methodology. It provides a level of understanding that will be essential for researchers, developers, and users of leading EDA tools going forward." (Andrew B. Kahng, Professor of CSE and ECE, University of California, San Diego) Details ISBN1475779496 Author Pinhong Chen Language English Edition 04200th Subtitle For Deep Sub-Micron Digital Designs ISBN-10 1475779496 ISBN-13 9781475779493 Year 2013 Publication Date 2013-05-31 Imprint Springer-Verlag New York Inc. Place of Publication New York, NY Country of Publication United States Short Title STATIC CROSSTALK-NOISE ANALYSI Media Book Illustrations XVIII, 113 p. DEWEY 621.38224 AU Release Date 2013-05-31 NZ Release Date 2013-05-31 US Release Date 2013-05-31 UK Release Date 2013-05-31 Pages 113 Publisher Springer-Verlag New York Inc. Edition Description Softcover reprint of the original 1st ed. 2004 Format Paperback Alternative 9781402080913 Audience Professional & Vocational We've got this At The Nile, if you're looking for it, we've got it. With fast shipping, low prices, friendly service and well over a million items - you're bound to find what you want, at a price you'll love! TheNile_Item_ID:96306385;

Price: 217.11 AUD

Location: Melbourne

End Time: 2025-01-28T09:06:19.000Z

Shipping Cost: 9.28 AUD